The invention relates to a semiconductor component and to a method for fabricating a semiconductor component. Semiconductor components are used in a very wide range of fields and are in some cases exposed to a large number of unfavorable influences which can destroy the semiconductor component, such as for example heat, cold, moisture, etc.
Consequently, molding compound is used to seal a semiconductor body of a semiconductor component. However, this molding compound may become detached from the semiconductor body. This problem occurs to an increased extent in particular in the case of power technologies, in which very thick copper (>2 μm) is used instead of the layer of aluminum in order to improve the current-carrying capacity. The power metallization may in this case cover well over 50% of the surface area of the chip. To protect the copper from corrosion, the copper may be covered with an NiP/Pd/Au layer. This layer sequence also allows bonding using an Au nail head or an Al wedge.
FIGS. 1-0 to 1-7 illustrates the production of a chip of this type in a number of steps. In the basic process of FIG. 1-0, the oxide O is passivated P by means of sputtering and a Via2 etch to a metal layer Met2 is carried out. In the next step of FIG. 1-1, sputtering is carried out to produce a tungsten/titanium barrier W/Ti, followed by sputtering to produce a copper seed layer Cu-S. In the following step of FIG. 1-2, a negative resist L with a thickness of approx. 30 μm is applied by means of photographic technology. This is followed, in the next step of FIG. 1-3, by an electroplating process, in which copper Cu is applied with a thickness of, for example, approx. 20 μm. Then, the negative resist L is stripped, cf. step FIG. 1-4. In the step of FIG. 1-5, the barrier/seed layer, that is, the tungsten/titanium barrier W/Ti and the copper seed layer Cu-S are stripped, and in the step of FIG. 1-6, a coating C is applied over the copper Cu by means of autogenous electroplating. The bonding of the chip is illustrated in the step of FIG. 1-7.
It should be noted that throughout the following description, in each case identical reference symbols are used to denote identical layers or materials.
With chips or semiconductor components of this type, the problem arises that the housing molding compounds (also referred to below as molding compounds) have poor adhesion to precious metals, and therefore there is a high risk of the molding compound becoming detached or delaminated from the chip surface, that is, from the semiconductor base surface. The delamination of the molding compound from the chip surface is described, inter alia, in ULSI Technology; Chapter 10; C. Y. Chang, S. M. Sze, McGraw-Hill; ISBN 0-07-114105-7.
The delamination can cause the metallization and/or the chip passivation to be damaged, in particular in the event of fluctuating thermal loads. Moisture can collect at the delaminated chip surfaces and may lead, inter alia, to leakage currents and even short circuits between adjacent copper interconnects or components. Moreover, in the case of passivation cracks, the moisture may penetrate further into the chip, where it can lead to chip malfunctions. In other words, the semiconductor component is destroyed by the delamination, so that it is no longer guaranteed to be able to function.
If power copper is used, one possible way of avoiding the problems described above is for the molding compound to be matched to the chip passivation and to the uncovered metal layers, that is, to copper, in such a way that the molding compound bonds both to the uncovered metal layers, that is, the copper, and to the chip passivation. A procedure of this type is described, for example, in “LeadFrameOnChip offers Integrated Power Bus and Bond over Active Circuit”; T Efland; Proceedings of 2001 International Symposium on Power Semiconductors Devices & ICs; Osaka; pp. 65-68, where the molding compound has to cover large areas of copper. Matching of the molding compound means that two different molding compounds, that is, the standard molding compound and the molding compound which is optimized for copper, have to be processed, which entails additional logistics costs and/or requires new molding machines in the back end.
Even the use of photoimide to improve the bonding between molding compound and chip, as is used for standard aluminum metallization, does not give any indication as to how to improve the bonding of the molding compound to the chip. If the topology of the power copper fluctuates extremely extensively, with height differences of >5 μm, the ability of this process used for standard aluminum metallization to be transferred to this application is very questionable. Firstly, the imide does not need to flow fully into all the trenches, resulting in the formation of cavities in which moisture can in turn accumulate. Secondly, the imide always has to be thermally cured in furnaces. Since layers comprising Au, Pd, Ni and Cu have already been applied to the wafers, dedicated furnaces have to be used in order to avoid cross-contamination with standard wafers. This would entail machinery investment costs. Furthermore, the imide has to be opened up again using an expensive photographic working step.